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  Technical Updates (by: TACKtech Team) [Page: 618 of 618] @ TACKtech Corp.  

06.19.2000 - AMD Duron smokes the Intel Celeron



View AMD related news. One of the reasons that the new Celeron performed so poorly, even when overclocked to the same speed, as the Pentium III (i.e. Celeron 850/100 vs Pentium III 850/100) was because the Celeron’s L2 cache featured a 4-way set associative mapping algorithm versus the Pentium III’s 8-way set associative L2 cache. The reason this discrepancy exists is because Intel essentially disables 1/2 of the L2 cache on the Pentium III in order to produce a Celeron (this can be confirmed by noting that the die sizes of the two chips are identical) and by doing that you essentially get half the “associativity”.
Full View / NID: 4 / Submitted by: TACKtech Team

06.06.2000 - More Intel 820 chipset problems



View Intel-Press related news. Intel to delay new Timna Integrated Processor due to the memory translation hub (MTH) problem. - More 820 problems spreading!
Full View / NID: 3 / Submitted by: TACKtech Team

06.05.2000 - AMD has released the Thunderbird Chips, today



View AMD related news. AMD has released the Thunderbird Chips, today.
Full View / NID: 2 / Submitted by: TACKtech Team
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